Enhancing Image Processing Capabilities through Advanced Approximate Multipliers

Authors

  • Sreelakshmi Vadlamudi JNTUK
  • Syamala Yarlagadda Seshadri Rao Gudlavalleru Engineering Collge
  • R. Madhu

DOI:

https://doi.org/10.22399/ijcesen.1399

Keywords:

Approximate computing, Image processing, 4-2 compressors, Real-time processing, Image enhancement

Abstract

This paper explores the utilization of advanced approximate multipliers and 4-2 compressors to enhance efficiency in digital image processing applications. As the demand for real-time image analysis grows, the need for computational efficiency becomes increasingly critical, especially in resource-constrained environments. The proposed approach employs approximate computing to achieve a significant reduction in processing speeds and energy consumption while maintaining acceptable levels of output quality. Through a systematic implementation using a Field-Programmable Gate Array (FPGA) and MATLAB, we demonstrate the effectiveness of approximation techniques in image blending and enhancement tasks. Experimental results highlight a favorable trade-off between accuracy and performance, indicating that minor inaccuracies do not significantly impair visual quality. Our findings suggest that integrating approximate computing methodologies can revolutionize various technology-driven industries by enabling faster and more efficient image processing solutions

References

Ma, Y., Wang, L., Liu, P., & Ranjan, R. (2015). Towards building a data-intensive index for big data computing–A case study of Remote Sensing data processing. Information Sciences, 319, 171–188. https://doi.org/10.1016/j.ins.2015.02.004

Umirzakova, S., Ahmad, S., Khan, L. U., & Whangbo, T. (2023). Medical image super-resolution for smart healthcare applications: A comprehensive survey. Information Fusion, 102075. https://doi.org/10.1016/j.inffus.2023.102075

Wolf, W. (2010). High-performance embedded computing: Architectures, applications, and methodologies. Elsevier.

Garcia, P., Compton, K., Schulte, M., Blem, E., & Fu, W. (2006). An overview of reconfigurable hardware in embedded systems. EURASIP Journal on Embedded Systems, 2006, 1–19. https://doi.org/10.1155/ES/2006/23679

Agrawal, A., Choi, J., Gopalakrishnan, K., Gupta, S., Nair, R., Oh, J., Prener, D. A., Shukla, S., Srinivasan, V., & Sura, Z. (2016, October). Approximate computing: Challenges and opportunities. In 2016 IEEE International Conference on Rebooting Computing (ICRC) (pp. 1–8). IEEE. https://doi.org/10.1109/ICRC.2016.7738708

Amanollahi, S., Kamal, M., Afzali-Kusha, A., & Pedram, M. (2020). Circuit-level techniques for logic and memory blocks in approximate computing systems. Proceedings of the IEEE, 108(12), 2150–2177. https://doi.org/10.1109/JPROC.2020.3025098

Grundhöfer, A., & Iwai, D. (2018, May). Recent advances in projection mapping algorithms, hardware and applications. Computer Graphics Forum, 37(2), 653–675. https://doi.org/10.1111/cgf.13465

Bock, C. H., Poole, G. H., Parker, P. E., & Gottwald, T. R. (2010). Plant disease severity estimated visually, by digital photography and image analysis, and by hyperspectral imaging. Critical Reviews in Plant Sciences, 29(2), 59–107. https://doi.org/10.1080/07352681003617285

Lingamneni, A., Enz, C., Palem, K., & Piguet, C. (2013). Designing energy-efficient arithmetic operators using inexact computing. Journal of Low Power Electronics, 9(1), 141–153. https://doi.org/10.1166/jolpe.2013.1231

Huang, J., & Lach, J. (2011, January). Exploring the fidelity-efficiency design space using imprecise arithmetic. In 16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011) (pp. 579–584). IEEE. https://doi.org/10.1109/ASPDAC.2011.5722228

Mahdiani, H. R., Ahmadi, A., Fakhraie, S. M., & Lucas, C. (2009). Bio-inspired imprecise computational blocks for efficient VLSI implementation of soft-computing applications. IEEE Transactions on Circuits and Systems I: 57(4), 850–862. https://doi.org/10.1109/TCSI.2009.2027626

Gupta, V., Mohapatra, D., Park, S. P., Raghunathan, A., & Roy, K. (2011, August). IMPACT: IMPrecise adders for low-power approximate computing. In IEEE/ACM International Symposium on Low Power Electronics and Design (pp. 409–414). https://doi.org/10.1109/ISLPED.2011.5993664

Cheemalavagu, S., Korkmaz, P., Palem, K. V., Akgul, B. E., & Chakrapani, L. N. (2005, October). A probabilistic CMOS switch and its realization by exploiting noise. In IFIP International Conference on VLSI (pp. 535–541).

Lau, M. S., Ling, K. V., Chu, Y. C., & Bhanu, A. (2010, March). A general mathematical model of probabilistic ripple-carry adders. In 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010) (pp. 1100–1105). IEEE. https://doi.org/10.1109/DATE.2010.5457038

Gupta, V., Mohapatra, D., Raghunathan, A., & Roy, K. (2013). Low-power digital signal processing using approximate adders. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 32(1), 124–137. https://doi.org/10.1109/TCAD.2012.2223466

Yang, Z., Jain, A., Liang, J., Han, J., & Lombardi, F. (2013, August). Approximate XOR/XNOR-based adders for inexact computing. In 2013 IEEE International Conference on Nanotechnology (IEEE-NANO 2013) (pp. 690–693). IEEE.

Mahdiani, H. R., Ahmadi, A., Fakhraie, S. M., & Lucas, C. (2009). Bio-inspired imprecise computational blocks for efficient VLSI implementation of soft-computing applications. IEEE Transactions on Circuits and Systems I: 57(4), 850–862. https://doi.org/10.1109/TCSI.2009.2027626

Lu, S. L. (2004). Speeding up processing with approximation circuits. Computer, 37(3), 67–73.

Verma, A. K., Brisk, P., & Ienne, P. (2008, March). Variable latency speculative addition: A new paradigm for arithmetic circuit design. In Proceedings of the conference on Design, Automation and Test in Europe (pp. 1250–1255).

Agaian, S. S., Panetta, K., & Grigoryan, A. M. (2001). Transform-based image enhancement algorithms with performance measure. IEEE Transactions on Image Processing, 10(3), 367–382.

Shih, F. Y. (2017). Image processing and mathematical morphology: Fundamentals and applications. CRC Press.

Hashemi, S. (2018). Approximate Computing Techniques for Accuracy-Energy Trade-offs (Doctoral dissertation, Brown University).

Strollo, A. G. M., Napoli, E., De Caro, D., Petra, N., & Di Meo, G. (2020). Comparison and extension of approximate 4-2 compressors for low-power approximate multipliers. IEEE Transactions on Circuits and Systems I: 67(9), 3021–3034.

Aizaz, Z., & Khare, K. (2022, January). State-of-art analysis of multiplier designs for image processing and convolutional neural network applications. In 2022 International Conference for Advancement in Technology (ICONAT) (pp. 1–11). IEEE.

Sreeparvathy, S., George, R., Kuruvithadam, R. M., & Nalesh, S. (2021, December). Fast Booth Multipliers Using Approximate 4:2 Compressors. In 2021 IEEE International Symposium on Smart Electronic Systems (iSES) (pp. 157–160). IEEE.

Han, J., & Orshansky, M. (2013, May). Approximate computing: An emerging paradigm for energy-efficient design. In 2013 18th IEEE European Test Symposium (ETS) (pp. 1–6). IEEE.

Liang, J., Han, J., & Lombardi, F. (2012). New metrics for the reliability of approximate and probabilistic adders. IEEE Transactions on Computers, 62(9), 1760–1771.

Park, J., Choi, J. H., & Roy, K. (2009). Dynamic bit-width adaptation in DCT: An approach to trade off image quality and computation energy. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 18(5), 787–793.

Chippa, V. K., Chakradhar, S. T., Roy, K., & Raghunathan, A. (2013, May). Analysis and characterization of inherent application resilience for approximate computing. In Proceedings of the 50th Annual Design Automation Conference (pp. 1–9).

Venkatachalam, S., & Ko, S. B. (2017). Design of power and area efficient approximate multipliers. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 25(5), 1782–1786.

Venkatachalam, S., Lee, H. J., & Ko, S. B. (2018, May). Power efficient approximate booth multiplier. In 2018 IEEE International Symposium on Circuits and Systems (ISCAS) (pp. 1–4). IEEE.

Kong, T., & Li, S. (2021). Design and analysis of approximate 4–2 compressors for high-accuracy multipliers. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 29(10), 1771–1781.

Mazloum, J., & Siahkal-Mahalle, B. H. (2023). Improving the accuracy of approximate multipliers based on the characteristics of 4:2 compressors. Microprocessors and Microsystems, 98, 104804.

Weinberger, M. J., Seroussi, G., & Sapiro, G. (2000). The LOCO-I lossless image compression algorithm: Principles and standardization into JPEG-LS. IEEE Transactions on Image Processing, 9(8), 1309–1324.

Chandrasekharan, A., Soeken, M., Große, D., & Drechsler, R. (2016, November). Approximation-aware rewriting of AIGs for error tolerant applications. In 2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) (pp. 1–8). IEEE.

Venkataramani, S., Sun, X., Wang, N., Chen, C. Y., Choi, J., Kang, M., Agarwal, A., Oh, J., Jain, S., Babinsky, T., & Cao, N. (2020). Efficient AI system design with cross-layer approximate computing. Proceedings of the IEEE, 108(12), 2232–2250.

Li, C., & Bovik, A. C. (2010). Content-partitioned structural similarity index for image quality assessment. Signal Processing: Image Communication, 25(7), 517–526.

Li, C., & Bovik, A. C. (2011). Three-component weighted structural similarity index. IEEE Transactions on Image Processing, 20(5), 1123–1132. https://doi.org/10.1109/TIP.2010.2092435

Wang, Z., Bovik, A. C., Sheikh, H. R., & Simoncelli, E. P. (2004). Image quality assessment: From error visibility to structural similarity. IEEE Transactions on Image Processing, 13(4), 600–612. https://doi.org/10.1109/TIP.2003.819861

Downloads

Published

2025-04-03

How to Cite

Vadlamudi, S., Yarlagadda, S., & R. Madhu. (2025). Enhancing Image Processing Capabilities through Advanced Approximate Multipliers. International Journal of Computational and Experimental Science and Engineering, 11(2). https://doi.org/10.22399/ijcesen.1399

Issue

Section

Research Article